Repositori institucional URV
| URV's Author/s: | Cantó Navarro, Enrique Fernando |
| Author, as appears in the article.: | Lumbiarres-Lopez R; Lopez-Garcia M; Canto-Navarro E |
| Author's mail: | enrique.canto@urv.cat |
| Author identifier: | 0000-0002-5674-4119 |
| Journal publication year: | 2016 |
| Publication Type: | Journal Publications |
| APA: | Lumbiarres-Lopez R; Lopez-Garcia M; Canto-Navarro E (2016). A new countermeasure against side-channel attacks based on hardware-software co-design. Microprocessors And Microsystems, 45(), 324-338. DOI: 10.1016/j.micpro.2016.06.009 |
| Papper original source: | Microprocessors And Microsystems. 45 324-338 |
| Abstract: | This paper aims at presenting a new countermeasure against Side-Channel Analysis (SCA) attacks, whose implementation is based on a hardware-software co-design. The hardware architecture consists of a microprocessor, which executes the algorithm using a false key, and a coprocessor that performs several operations that are necessary to retrieve the original text that was encrypted with the real key. The coprocessor hardly affects the power consumption of the device, so that any classical attack based on such power consumption would reveal a false key. Additionally, as the operations carried out by the coprocessor are performed in parallel with the microprocessor, the execution time devoted for encrypting a specific text is not affected by the proposed countermeasure. In order to verify the correctness of our proposal, the system was implemented on a Virtex 5 FPGA. Different SCA attacks were performed on several functions of AES algorithm. Experimental results show in all cases that the system is effectively protected by revealing a false encryption key. © 2016 |
| Article's DOI: | 10.1016/j.micpro.2016.06.009 |
| Link to the original source: | https://www.sciencedirect.com/science/article/abs/pii/S014193311630076X |
| Papper version: | info:eu-repo/semantics/acceptedVersion |
| licence for use: | https://creativecommons.org/licenses/by/3.0/es/ |
| Department: | Enginyeria Electrònica, Elèctrica i Automàtica |
| Licence document URL: | https://repositori.urv.cat/ca/proteccio-de-dades/ |
| Thematic Areas: | Software Interdisciplinar Hardware and architecture Engineering, electrical & electronic Engenharias iv Engenharias iii Computer science, theory & methods Computer science, hardware & architecture Computer networks and communications Ciências biológicas i Ciência da computação Artificial intelligence |
| Keywords: | Virtex-5 Software design Side-channel analysis Side channel attack Reconfigurable hardware Integrated circuit design Hardware-software codesign Hardware architecture Hardware Encryption key Electric power utilization Cryptography Countermeasure Co-processors Co-designs Aes algorithms Aes algorithm and hardware-software co-design |
| Entity: | Universitat Rovira i Virgili |
| Record's date: | 2024-09-07 |
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