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Avoiding Instabilities in Power Electronic Systems: Toward an On-Chip Implementation

  • Dades identificatives

    Identificador: imarina:5132881
    Autors:
    Abusorrah A, Mandal K, Giaouris D, El Aroudi A, Al-Hindawi M, Al-Turki Y, Banerjee S
    Resum:
    The available controller chips for power electronic systems are used for specific transient and steady-state performances. In such systems, the parameter ranges for stable operation are delimited by slow-timescale as well as fast-timescale instabilities. The usual practice is to design the control loop based on the state-space averaging technique, which cannot predict the fast-timescale instabilities. In this study, the first attempt has been made to propose a new design of the controller chip that can suppress these instabilities, thus extending the stable operating range in the parameter space. For this, the authors make use of the Filippov method which can effectively predict both types of instabilities. In this approach, the stability of the system is obtained in terms of the state transition matrices across each subsystem and saltation matrices across each switching event. The basic idea is to exercise control over the saltation matrices to increase the stability margin of the periodic orbit. Since in the Filippov approach an increase in the number of switching events in a cycle does not increase the complexity of the analysis, the proposed controller chip will be particularly useful in complex power electronic systems such as interconnected converters, multi-input multi-output converters, resonant converters, micro-grids and so on.
  • Altres:

    Autor segons l'article: Abusorrah A, Mandal K, Giaouris D, El Aroudi A, Al-Hindawi M, Al-Turki Y, Banerjee S
    Departament: Enginyeria Electrònica, Elèctrica i Automàtica
    Autor/s de la URV: El Aroudi Chaoui, Abdelali
    Paraules clau: Hashtag Etiqueta «#» @uroweb @residentesaeu @infoAeu
    Resum: The available controller chips for power electronic systems are used for specific transient and steady-state performances. In such systems, the parameter ranges for stable operation are delimited by slow-timescale as well as fast-timescale instabilities. The usual practice is to design the control loop based on the state-space averaging technique, which cannot predict the fast-timescale instabilities. In this study, the first attempt has been made to propose a new design of the controller chip that can suppress these instabilities, thus extending the stable operating range in the parameter space. For this, the authors make use of the Filippov method which can effectively predict both types of instabilities. In this approach, the stability of the system is obtained in terms of the state transition matrices across each subsystem and saltation matrices across each switching event. The basic idea is to exercise control over the saltation matrices to increase the stability margin of the periodic orbit. Since in the Filippov approach an increase in the number of switching events in a cycle does not increase the complexity of the analysis, the proposed controller chip will be particularly useful in complex power electronic systems such as interconnected converters, multi-input multi-output converters, resonant converters, micro-grids and so on.
    Àrees temàtiques: Engineering, electrical & electronic Engenharias iv Engenharias iii Electrical and electronic engineering
    Accès a la llicència d'ús: https://creativecommons.org/licenses/by/3.0/es/
    ISSN: 17554535
    Adreça de correu electrònic de l'autor: abdelali.elaroudi@urv.cat
    Identificador de l'autor: 0000-0001-9103-7762
    Data d'alta del registre: 2024-09-07
    Versió de l'article dipositat: info:eu-repo/semantics/publishedVersion
    URL Document de llicència: https://repositori.urv.cat/ca/proteccio-de-dades/
    Referència a l'article segons font original: Iet Power Electronics. 10 (13): 1778-1787
    Referència de l'ítem segons les normes APA: Abusorrah A, Mandal K, Giaouris D, El Aroudi A, Al-Hindawi M, Al-Turki Y, Banerjee S (2017). Avoiding Instabilities in Power Electronic Systems: Toward an On-Chip Implementation. Iet Power Electronics, 10(13), 1778-1787. DOI: 10.1049/iet-pel.2017.0147
    Entitat: Universitat Rovira i Virgili
    Any de publicació de la revista: 2017
    Tipus de publicació: Journal Publications
  • Paraules clau:

    Electrical and Electronic Engineering,Engineering, Electrical & Electronic
    Engineering, electrical & electronic
    Engenharias iv
    Engenharias iii
    Electrical and electronic engineering
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