Interleaved Digital Power Factor Correction Based on the Sliding-Mode Approach

Identifier:  PC:1468

Handle: https://hdl.handle.net/20.500.11797/PC1468

Authors:  Enric Vidal-Idiarte; Adria Marcos-Pastor; Angel Cid-Pastor; L. Martinez-Salamero

Abstract:
This study describes a digitally controlled power factor correction (PFC) system based on two interleaved boost converters operating with pulsewidth modulation (PWM). Both converters are independently controlled by an inner control loop based on a discrete-time sliding-mode (SM) approach that imposes loss-free resistor (LFR) behavior on each cell. The switching surface implements an average current-mode controller so that the power factor (PF) is high. The SM-based digital controller is designed to operate at a constant switching frequency so that the interleaving technique, which is recommended for ac-dc power conversion systems higher than 1 kW, can be readily applied. An outer loop regulates the output voltage by means of a discrete-time proportional-integral (PI) compensator directly obtained from a discrete-time small-signal model of the ideal sliding dynamics. The control law proposed has been validated using numerical simulations and experimental results in a 2-kW prototype.