Repositori URV

Identifier: imarina:3649937

Handle: https://hdl.handle.net/20.500.11797/imarina3649937

Authors:
Bodetto M., Aroudi A., Cid-Pastor A., Calvente J., Martínez-Salamero L.

Abstract:
- AC-DC PFC circuits used in low power applications have to overcome important power quality problems related to crest and power factors as well as total harmonic distortion, and in many cases they have to exhibit a high degree of output regulation. The design of efficient drivers for low power applications using high-order converters is considered in this paper. Power factor correction is achieved by imposing a loss-free resistor behaviour to SEPIC and Ćuk converters by means of an internal loop based on sliding-mode control, which requires a hysteretic comparator for its implementation. However, with a constant hysteresis width, the system exhibits harmful harmonic distortion in the input line current waveform, so that a variable hysteresis window is used instead to avoid this distortion near the zero crossings of the input current. The subsequent analysis of the ideal sliding dynamics around the equilibrium point allows the design of an outer control loop to regulate the output current. Mathematical analysis, numerical simulations and experimental results are presented to demonstrate the functionality of the proposed technique obtaining a significant improvement in terms of decreasing the total harmonic distortion. A dimmable LEDs driver supplying an HBLEDs string with a wide range of output current regulation illustrates the design.