Articles producció científicaEnginyeria Electrònica, Elèctrica i Automàtica

Dynamic simulation of a-IGZO TFT circuits using the Analytical Full Capacitance Model (AFCM)

  • Identification data

    Identifier:  imarina:9139049
    Handle: https://hdl.handle.net/20.500.11797/imarina9139049
    Authors:  Hernández-Barrios, Y; Gaspar-Angeles, JN; Estrada, M; Iñiguez, B; Cerdeira, A
    Abstract:
    CCBY The Analytical Full Capacitance Model (AFCM) for amorphous oxide semiconductors thin film transistors (AOSTFTs) is first validated, using a 19-stages Ring Oscillator (RO) fabricated and measured. The model was described in Verilog-A language to use it in a circuit simulator in this case SmartSpice from Silvaco. The model includes the extrinsic effects related to specific overlap capacitances present in bottom-gate AOSTFT structures. The dynamic behavior of the simulated circuit, when the TFT internal capacitances are increased or decreased and for different supply voltages of 10, 15 and 20 V, is compared with measured characteristics, obtaining a very good agreement. Afterwards, the AFCM is used to simulate the dynamic behavior of a pixel control circuit for a light emitting diode active matrix display (AMOLED), using an AOSTFT.

  • Others:

    Link to the original source: https://ieeexplore.ieee.org/document/9296235
    APA: Hernández-Barrios, Y; Gaspar-Angeles, JN; Estrada, M; Iñiguez, B; Cerdeira, A (2021). Dynamic simulation of a-IGZO TFT circuits using the Analytical Full Capacitance Model (AFCM). Ieee Journal Of The Electron Devices Society, 9(), 464-468. DOI: 10.1109/JEDS.2020.3045347
    Paper original source: Ieee Journal Of The Electron Devices Society. 9 464-468
    Article's DOI: 10.1109/JEDS.2020.3045347
    Journal publication year: 2021-01-01
    Entity: Universitat Rovira i Virgili
    Paper version: info:eu-repo/semantics/publishedVersion
    Record's date: 2026-05-09
    URV's Author/s: Iñiguez Nicolau, Benjamin
    Department: Enginyeria Electrònica, Elèctrica i Automàtica
    Licence document URL: https://repositori.urv.cat/ca/proteccio-de-dades/
    Publication Type: Journal Publications
    ISSN: 0018-9383
    Author, as appears in the article.: Hernández-Barrios, Y; Gaspar-Angeles, JN; Estrada, M; Iñiguez, B; Cerdeira, A
    licence for use: https://creativecommons.org/licenses/by/3.0/es/
    e-ISSN: 1557-9646
    Thematic Areas: Engineering, electrical & electronic, Electronic, optical and magnetic materials, Electrical and electronic engineering, Ciências agrárias i, Biotechnology
    Author's mail: benjamin.iniguez@urv.cat, benjamin.iniguez@urv.cat

  • Keywords:

    Voltage measurement
    Verilog-a
    Transistors
    Thin film transistors
    Semiconductor device modeling
    Mobility
    Inverters
    Integrated circuit modeling
    Dynamic model
    Circuit simulator
    Capacitances model.
    Capacitances model
    Capacitance
    Biotechnology
    Electrical and Electronic Engineering
    Electronic
    Optical and Magnetic Materials
    Engineering
    Electrical & Electronic
    Ciências agrárias i

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