Author, as appears in the article.: Hernandez-Barrios Y; Gaspar-Angeles JN; Estrada M; Iniguez B; Cerdeira A

Department: Enginyeria Electrònica, Elèctrica i Automàtica

e-ISSN: 1557-9646

URV's Author/s: Iñiguez Nicolau, Benjamin

Keywords: Voltage measurement Verilog-a Transistors Thin film transistors Semiconductor device modeling Mobility Inverters Integrated circuit modeling Dynamic model Circuit simulator Capacitances model. Capacitances model Capacitance

Abstract: CCBY The Analytical Full Capacitance Model (AFCM) for amorphous oxide semiconductors thin film transistors (AOSTFTs) is first validated, using a 19-stages Ring Oscillator (RO) fabricated and measured. The model was described in Verilog-A language to use it in a circuit simulator in this case SmartSpice from Silvaco. The model includes the extrinsic effects related to specific overlap capacitances present in bottom-gate AOSTFT structures. The dynamic behavior of the simulated circuit, when the TFT internal capacitances are increased or decreased and for different supply voltages of 10, 15 and 20 V, is compared with measured characteristics, obtaining a very good agreement. Afterwards, the AFCM is used to simulate the dynamic behavior of a pixel control circuit for a light emitting diode active matrix display (AMOLED), using an AOSTFT.

Thematic Areas: Engineering, electrical & electronic Electronic, optical and magnetic materials Electrical and electronic engineering Biotechnology

licence for use: https://creativecommons.org/licenses/by/3.0/es/

ISSN: 0018-9383

Author's mail: benjamin.iniguez@urv.cat

Author identifier: 0000-0002-6504-7980

Record's date: 2023-02-19

Papper version: info:eu-repo/semantics/publishedVersion

Link to the original source: https://ieeexplore.ieee.org/document/9296235

Licence document URL: http://repositori.urv.cat/ca/proteccio-de-dades/

Papper original source: Ieee Journal Of The Electron Devices Society. 9 464-468

APA: Hernandez-Barrios Y; Gaspar-Angeles JN; Estrada M; Iniguez B; Cerdeira A (2021). Dynamic simulation of a-IGZO TFT circuits using the Analytical Full Capacitance Model (AFCM). Ieee Journal Of The Electron Devices Society, 9(), 464-468. DOI: 10.1109/JEDS.2020.3045347

Article's DOI: 10.1109/JEDS.2020.3045347

Entity: Universitat Rovira i Virgili

Journal publication year: 2021

Publication Type: Journal Publications