Articles producció científica> Enginyeria Informàtica i Matemàtiques

A Security Model for Randomization-based Protected Caches

  • Identification data

    Identifier: imarina:9280516
    Authors:
    Ribes-González JFarràs OHernández CKostalabros VMoretó M
    Abstract:
    Cache side-channel attacks allow adversaries to learn sensitive information about co-running processes by using only access latency measures and cache contention. This vulnerability has been shown to lead to several microarchitectural attacks. As a promising solution, recent work proposes Randomization-based Protected Caches (RPCs). RPCs randomize cache addresses, changing keys periodically so as to avoid long-term leakage. Unfortunately, recent attacks have called the security of state-of-the-art RPCs into question. In this work, we tackle the problem of formally defining and analyzing the security properties of RPCs. We first give security definitions against access-based cache side-channel attacks that capture security against known attacks such as Prime+Probe and Evict+Probe. Then, using these definitions, we obtain results that allow to guarantee security by adequately choosing the rekeying period, the key generation algorithm and the cache randomizer, thus providing security proofs for RPCs under certain assumptions.
  • Others:

    Author, as appears in the article.: Ribes-González J; Farràs O; Hernández C; Kostalabros V; Moretó M
    Department: Enginyeria Informàtica i Matemàtiques
    URV's Author/s: Farràs Ventura, Oriol / Ribes Gonzalez, Jordi
    Keywords: Timing attacks Security definition Randomly-mapped caches Randomization-based protected caches Pseudo-random functions Cache side-channel attacks
    Abstract: Cache side-channel attacks allow adversaries to learn sensitive information about co-running processes by using only access latency measures and cache contention. This vulnerability has been shown to lead to several microarchitectural attacks. As a promising solution, recent work proposes Randomization-based Protected Caches (RPCs). RPCs randomize cache addresses, changing keys periodically so as to avoid long-term leakage. Unfortunately, recent attacks have called the security of state-of-the-art RPCs into question. In this work, we tackle the problem of formally defining and analyzing the security properties of RPCs. We first give security definitions against access-based cache side-channel attacks that capture security against known attacks such as Prime+Probe and Evict+Probe. Then, using these definitions, we obtain results that allow to guarantee security by adequately choosing the rekeying period, the key generation algorithm and the cache randomizer, thus providing security proofs for RPCs under certain assumptions.
    Thematic Areas: Software Signal processing Hardware and architecture Computer networks and communications Computer graphics and computer-aided design Artificial intelligence
    licence for use: https://creativecommons.org/licenses/by/3.0/es/
    Author's mail: oriol.farras@urv.cat
    Author identifier: 0000-0002-7495-5980
    Record's date: 2024-09-07
    Papper version: info:eu-repo/semantics/publishedVersion
    Link to the original source: https://tches.iacr.org/index.php/TCHES/article/view/9693
    Licence document URL: https://repositori.urv.cat/ca/proteccio-de-dades/
    Papper original source: Iacr Transactions On Cryptographic Hardware And Embedded Systems. 2022 (3): 1-25
    APA: Ribes-González J; Farràs O; Hernández C; Kostalabros V; Moretó M (2022). A Security Model for Randomization-based Protected Caches. Iacr Transactions On Cryptographic Hardware And Embedded Systems, 2022(3), 1-25. DOI: 10.46586/tches.v2022.i3.1-25
    Article's DOI: 10.46586/tches.v2022.i3.1-25
    Entity: Universitat Rovira i Virgili
    Journal publication year: 2022
    Publication Type: Journal Publications
  • Keywords:

    Artificial Intelligence,Computer Graphics and Computer-Aided Design,Computer Networks and Communications,Hardware and Architecture,Signal Processing,Software
    Timing attacks
    Security definition
    Randomly-mapped caches
    Randomization-based protected caches
    Pseudo-random functions
    Cache side-channel attacks
    Software
    Signal processing
    Hardware and architecture
    Computer networks and communications
    Computer graphics and computer-aided design
    Artificial intelligence
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