Author, as appears in the article.: Jaafar H; Aouaj A; Bouziane A; Iñiguez B
Department: Enginyeria Electrònica, Elèctrica i Automàtica
URV's Author/s: Iñiguez Nicolau, Benjamin
Keywords: Transconductance Drain conductance Dmg-gc-dottdcd Dmg-gc-dot Atlas (silvaco)
Abstract: A compact model for dual-material gate graded-channel and dual-oxide thickness with two dielectric constant different cylindrical gate (DMG-GC-DOTTDCD) MOSFET was investigated in terms of transconductance, drain conductance and capacitance. Short channel effects are modeled with simple expressions, and incorporated into the core of the model (at the drain current). The design effectiveness of DMG-GC-DOTTDCD was monitored in comparing with the DMG-GC-DOT transistor, the effect of variations of technology parameters, was presented in terms of gate polarization and drain polarization. The results indicate that the DMG-GC-DOTTDCD devices have characteristics higher than the DMG-GC-DOT MOSFET. To validate the proposed model, we used the results obtained from the simulation of the device with the SILVACO-ATLAS-TCAD software.
Thematic Areas: Logic Hardware and architecture Electrical and electronic engineering Computer science applications
licence for use: https://creativecommons.org/licenses/by/3.0/es/
Author's mail: benjamin.iniguez@urv.cat
Author identifier: 0000-0002-6504-7980
Record's date: 2023-09-09
Papper version: info:eu-repo/semantics/publishedVersion
Papper original source: International Journal Of Reconfigurable And Embedded Systems. 9 (1): 34-41
APA: Jaafar H; Aouaj A; Bouziane A; Iñiguez B (2020). A compact model of transconductance and drain conductance for DMG-GC-DOT cylindrical gate MOSFET. International Journal Of Reconfigurable And Embedded Systems, 9(1), 34-41. DOI: 10.11591/ijres.v9.i1.pp34-41
Licence document URL: https://repositori.urv.cat/ca/proteccio-de-dades/
Entity: Universitat Rovira i Virgili
Journal publication year: 2020
Publication Type: Journal Publications
Repositori URV