Autor según el artículo: González, A. Rakvic, R. Molina, C. Lira. J.

Departamento: Enginyeria Informàtica i Matemàtiques

Resumen: The growing influence of wire delay in cache design has meant that access latencies to last-level cache banks are no longer constant. Non-Uniform Cache Architectures (NUCAs) have been proposed to address this problem. Furthermore, an efficient last-level cache is crucial in chip multiprocessors (CMP) architectures to reduce requests to the offchip memory, because of the significant speed gap between processor and memory. Therefore, a bank replacement policy that efficiently manages the NUCA cache is desirable. However, the decentralized nature of NUCA has eliminated the effectiveness of replacement policies because banks operate independently of each other, and hence their replacement decisions are restricted to a single NUCA bank. In this paper, we propose three different techniques to deal with replacements in NUCA caches.

Acceso a la licencia de uso: https://creativecommons.org/licenses/by/3.0/es/

ISSN: 0920-8542

Página final: 579

Volumen de revista: 64

Versión del articulo depositado: info:eu-repo/semantics/submittedVersion

Enlace a la fuente original: http://link.springer.com/article/10.1007/s11227-012-0859-6

DOI del artículo: 10.1007/s11227-012-0859-6

Entidad: Universitat Rovira i Virgili.

Año de publicación de la revista: 2013

Página inicial: 548