Autor segons l'article: Mounir, Ahmed; Iniguez, Benjamin; Lime, Francois; Kloes, Alexander; Knobloch, Theresia; Grasser, Tibor
Departament: Enginyeria Electrònica, Elèctrica i Automàtica
Autor/s de la URV: Iñiguez Nicolau, Benjamin / Lime, François Gilbert Marie
Paraules clau: 2-dimensional materials; 2d fets; Dc compact mode; Dc compact model; Graphen; Mos2 fets; Transistors; Unified charge control model
Resum: A physics-based analytical DC compact model for double and single gate TMD FETs is presented. The model is developed by calculating the charge density inside the 2D layer which is expressed in terms of the Lambert W function that recently has become the standard in SPICE simulators. The current is then calculated in terms of the charge densities at the drain and source ends of the channel. We validate our model against measurement data for different device structures. A superlinear current increase above certain gate voltage has been observed in some MoS2 FET devices, where we present a new mobility model to account for the observed phenomena. Despite the simplicity of the model, it shows very good agreement with the experimental data.
Àrees temàtiques: Astronomia / física; Ciências agrárias i; Condensed matter physics; Electrical and electronic engineering; Electronic, optical and magnetic materials; Engenharias iv; Engineering, electrical & electronic; Materiais; Materials chemistry; Physics, applied; Physics, condensed matter
Accès a la llicència d'ús: https://creativecommons.org/licenses/by/3.0/es/
Adreça de correu electrònic de l'autor: benjamin.iniguez@urv.cat; francois.lime@urv.cat
Data d'alta del registre: 2025-03-22
Versió de l'article dipositat: info:eu-repo/semantics/publishedVersion
Enllaç font original: https://www.sciencedirect.com/science/article/pii/S0038110123001156?via%3Dihub
Referència a l'article segons font original: Solid-State Electronics. 207 108702-
Referència de l'ítem segons les normes APA: Mounir, Ahmed; Iniguez, Benjamin; Lime, Francois; Kloes, Alexander; Knobloch, Theresia; Grasser, Tibor (2023). Compact I-V model for back-gated and double-gated TMD FETs. Solid-State Electronics, 207(), 108702-. DOI: 10.1016/j.sse.2023.108702
URL Document de llicència: https://repositori.urv.cat/ca/proteccio-de-dades/
DOI de l'article: 10.1016/j.sse.2023.108702
Entitat: Universitat Rovira i Virgili
Any de publicació de la revista: 2023
Tipus de publicació: Journal Publications
Repositori URV