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A compact model of transconductance and drain conductance for DMG-GC-DOT cylindrical gate MOSFET

  • Dades identificatives

    Identificador: imarina:9329061
    Autors:
    Jaafar HAouaj ABouziane AIñiguez B
    Resum:
    A compact model for dual-material gate graded-channel and dual-oxide thickness with two dielectric constant different cylindrical gate (DMG-GC-DOTTDCD) MOSFET was investigated in terms of transconductance, drain conductance and capacitance. Short channel effects are modeled with simple expressions, and incorporated into the core of the model (at the drain current). The design effectiveness of DMG-GC-DOTTDCD was monitored in comparing with the DMG-GC-DOT transistor, the effect of variations of technology parameters, was presented in terms of gate polarization and drain polarization. The results indicate that the DMG-GC-DOTTDCD devices have characteristics higher than the DMG-GC-DOT MOSFET. To validate the proposed model, we used the results obtained from the simulation of the device with the SILVACO-ATLAS-TCAD software.
  • Altres:

    Autor segons l'article: Jaafar H; Aouaj A; Bouziane A; Iñiguez B
    Departament: Enginyeria Electrònica, Elèctrica i Automàtica
    Autor/s de la URV: Iñiguez Nicolau, Benjamin
    Paraules clau: Transconductance Drain conductance Dmg-gc-dottdcd Dmg-gc-dot Atlas (silvaco)
    Resum: A compact model for dual-material gate graded-channel and dual-oxide thickness with two dielectric constant different cylindrical gate (DMG-GC-DOTTDCD) MOSFET was investigated in terms of transconductance, drain conductance and capacitance. Short channel effects are modeled with simple expressions, and incorporated into the core of the model (at the drain current). The design effectiveness of DMG-GC-DOTTDCD was monitored in comparing with the DMG-GC-DOT transistor, the effect of variations of technology parameters, was presented in terms of gate polarization and drain polarization. The results indicate that the DMG-GC-DOTTDCD devices have characteristics higher than the DMG-GC-DOT MOSFET. To validate the proposed model, we used the results obtained from the simulation of the device with the SILVACO-ATLAS-TCAD software.
    Àrees temàtiques: Logic Hardware and architecture Electrical and electronic engineering Computer science applications
    Accès a la llicència d'ús: https://creativecommons.org/licenses/by/3.0/es/
    Adreça de correu electrònic de l'autor: benjamin.iniguez@urv.cat
    Identificador de l'autor: 0000-0002-6504-7980
    Data d'alta del registre: 2023-09-09
    Versió de l'article dipositat: info:eu-repo/semantics/publishedVersion
    Enllaç font original: https://ijres.iaescore.com/index.php/IJRES/article/view/19506
    Referència a l'article segons font original: International Journal Of Reconfigurable And Embedded Systems. 9 (1): 34-41
    Referència de l'ítem segons les normes APA: Jaafar H; Aouaj A; Bouziane A; Iñiguez B (2020). A compact model of transconductance and drain conductance for DMG-GC-DOT cylindrical gate MOSFET. International Journal Of Reconfigurable And Embedded Systems, 9(1), 34-41. DOI: 10.11591/ijres.v9.i1.pp34-41
    URL Document de llicència: https://repositori.urv.cat/ca/proteccio-de-dades/
    DOI de l'article: 10.11591/ijres.v9.i1.pp34-41
    Entitat: Universitat Rovira i Virgili
    Any de publicació de la revista: 2020
    Tipus de publicació: Journal Publications
  • Paraules clau:

    Computer Science Applications,Electrical and Electronic Engineering,Hardware and Architecture,Logic
    Transconductance
    Drain conductance
    Dmg-gc-dottdcd
    Dmg-gc-dot
    Atlas (silvaco)
    Logic
    Hardware and architecture
    Electrical and electronic engineering
    Computer science applications
  • Documents:

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