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A compact model of transconductance and drain conductance for DMG-GC-DOT cylindrical gate MOSFET

  • Datos identificativos

    Identificador: imarina:9329061
    Autores:
    Jaafar HAouaj ABouziane AIñiguez B
    Resumen:
    A compact model for dual-material gate graded-channel and dual-oxide thickness with two dielectric constant different cylindrical gate (DMG-GC-DOTTDCD) MOSFET was investigated in terms of transconductance, drain conductance and capacitance. Short channel effects are modeled with simple expressions, and incorporated into the core of the model (at the drain current). The design effectiveness of DMG-GC-DOTTDCD was monitored in comparing with the DMG-GC-DOT transistor, the effect of variations of technology parameters, was presented in terms of gate polarization and drain polarization. The results indicate that the DMG-GC-DOTTDCD devices have characteristics higher than the DMG-GC-DOT MOSFET. To validate the proposed model, we used the results obtained from the simulation of the device with the SILVACO-ATLAS-TCAD software.
  • Otros:

    Autor según el artículo: Jaafar H; Aouaj A; Bouziane A; Iñiguez B
    Departamento: Enginyeria Electrònica, Elèctrica i Automàtica
    Autor/es de la URV: Iñiguez Nicolau, Benjamin
    Palabras clave: Transconductance Drain conductance Dmg-gc-dottdcd Dmg-gc-dot Atlas (silvaco)
    Resumen: A compact model for dual-material gate graded-channel and dual-oxide thickness with two dielectric constant different cylindrical gate (DMG-GC-DOTTDCD) MOSFET was investigated in terms of transconductance, drain conductance and capacitance. Short channel effects are modeled with simple expressions, and incorporated into the core of the model (at the drain current). The design effectiveness of DMG-GC-DOTTDCD was monitored in comparing with the DMG-GC-DOT transistor, the effect of variations of technology parameters, was presented in terms of gate polarization and drain polarization. The results indicate that the DMG-GC-DOTTDCD devices have characteristics higher than the DMG-GC-DOT MOSFET. To validate the proposed model, we used the results obtained from the simulation of the device with the SILVACO-ATLAS-TCAD software.
    Áreas temáticas: Logic Hardware and architecture Electrical and electronic engineering Computer science applications
    Acceso a la licencia de uso: https://creativecommons.org/licenses/by/3.0/es/
    Direcció de correo del autor: benjamin.iniguez@urv.cat
    Identificador del autor: 0000-0002-6504-7980
    Fecha de alta del registro: 2023-09-09
    Versión del articulo depositado: info:eu-repo/semantics/publishedVersion
    Enlace a la fuente original: https://ijres.iaescore.com/index.php/IJRES/article/view/19506
    Referencia al articulo segun fuente origial: International Journal Of Reconfigurable And Embedded Systems. 9 (1): 34-41
    Referencia de l'ítem segons les normes APA: Jaafar H; Aouaj A; Bouziane A; Iñiguez B (2020). A compact model of transconductance and drain conductance for DMG-GC-DOT cylindrical gate MOSFET. International Journal Of Reconfigurable And Embedded Systems, 9(1), 34-41. DOI: 10.11591/ijres.v9.i1.pp34-41
    URL Documento de licencia: https://repositori.urv.cat/ca/proteccio-de-dades/
    DOI del artículo: 10.11591/ijres.v9.i1.pp34-41
    Entidad: Universitat Rovira i Virgili
    Año de publicación de la revista: 2020
    Tipo de publicación: Journal Publications
  • Palabras clave:

    Computer Science Applications,Electrical and Electronic Engineering,Hardware and Architecture,Logic
    Transconductance
    Drain conductance
    Dmg-gc-dottdcd
    Dmg-gc-dot
    Atlas (silvaco)
    Logic
    Hardware and architecture
    Electrical and electronic engineering
    Computer science applications
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